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LC723482W 数据表(PDF) 8 Page - Sanyo Semicon Device |
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LC723482W 数据表(HTML) 8 Page - Sanyo Semicon Device |
8 / 15 page No. 7253-8/15 LC723481W/2W/3W Continued from preceding page. Pin No. Pin I/O Function I/O circuit General-purpose input and A/D converter input shared function ports. The IOS instruction (Pwn = FH) is used to switch between the general-purpose input and A/D converter port functions. The general-purpose input and A/D converter port functions can be switched by the bit, with 0 specifying general-purpose input, and 1 specifying the A/D converter input function. To select the A/D converter function, set up the A/D converter pin with an IOS instruction with Pwn set to 1. The A/D converter is started with the UCC instruction (b3 = 1, b2 = 1). The ADCE flag is set when the conversion completes. The INR instruction is used to read in the data. *: If an input instruction is executed for one of these pins which is set up for analog input, the read in data will be at the low level since CMOS input is disabled. In backup mode these pins go to the input disabled high-impedance state. These ports are set to their general-purpose input port function after a reset. The A/D converter is a 5-bit successive approximation type converter, and features a conversion time of 1.28 ms. Note that the full-scale A/D converter voltage (1FH) is (62 /96) VDD. 23 22 21 PF0/ADI0 PF1/ADI1 PF2/ADI3 I CMOS input/analog input Shared function ports that function either as LCD driver segment outputs or general- purpose I/O ports. The IOS instruction is used to switch between the segment output and the general- purpose I/O port functions. • When used as segment output ports The IOS (Pwn=8) instruction is used to set the general-purpose I/O port. b0 to 3 = S17 to S20/PG0 to PG3 (0: Segment output, 1: PG0 to PG3) The IOS (Pwn=9) instruction is used to set the general-purpose I/O port. b0 to 3 = S13 to S16/PH0 to PH3 (0: Segment output, 1: PH0 to PH3) • When used as general-purpose I/O ports The IOS instruction (Pwn=6, 7) is used to switch the I/O direction. The directions of these pins can be set individually in 1-bit units. b0 = PG0 b0 = PH0 b1 = PG1 0: Input b1 = PH1 0: Input b2 = PG2 1: Output b2 = PH2 1: Output b3 = PG3 b3 = PH3 In backup mode, if used as general-purpose I/O ports, they will be in the input disabled high-impedance state. If used as segment outputs, they will be held fixed at the low level. Although the general-purpose port/LCD port setting is a mask option, the setup with the IOS instruction described above is also necessary. 25 26 27 28 29 30 31 32 PG3/S20 PG2/S19 PG1/S18 PG0/S17 PH3/S16 PH2/S15 PH1/S14 PH0/S13 *2 O CMOS push-pull Continued on next page. LCD driver segment output pins. A 1/4-duty 1/2-bias drive technique is used. The frame frequency is 75 Hz. In backup mode, the outputs are fixed at the low level. After a reset, the outputs are fixed at the low level. 33 to 44 S12 to S1 O LCD driver common output pins. A 1/4-duty 1/2-bias drive technique is used. The frame frequency is 75 Hz. In backup mode, the outputs are fixed at the low level. After a reset, the outputs are fixed at the low level. 45 46 47 48 COM4 COM3 COM2 COM1 O LCD power supply step-up voltage inputs. 50 51 52 53 DBR4 DBR3 DBR2 DBR1 I CMOS push-pull |
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