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TC7WBD126FK 数据表(PDF) 3 Page - Toshiba Semiconductor

部件名 TC7WBD126FK
功能描述  Dual Bus Switch with Level Shift
Download  7 Pages
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制造商  TOSHIBA [Toshiba Semiconductor]
网页  http://www.semicon.toshiba.co.jp/eng
标志 TOSHIBA - Toshiba Semiconductor

TC7WBD126FK 数据表(HTML) 3 Page - Toshiba Semiconductor

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TC7WBD126FK
2001-12-04
3
Electrical Characteristics
DC Characteristics (Ta
==== −−−−40~85°C)
Characteristics
Symbol
Test Condition
VCC (V)
Min
Typ.
(Note 2)
Max
Unit
“H” level
VIH
4.5~5.5
2.0
Input voltage
“L” level
VIL
4.5~5.5
0.8
V
High-level output voltage
VOH
Figure 4
Input leakage current
IIN
VIN = 0~5.5 V
4.5~5.5
±1.0
µA
Power off leakage current
IOFF
A, B, OE
= 0~5.5 V
0
±1.0
µA
Off-state leakage current
(switch off)
ISZ
A, B
= 0~5.5 V, OE = GND
4.5~5.5
±1.0
µA
IIS = 30 mA
4.5
5
7
VIS = 0 V
IIS = 64 mA
4.5
5
7
ON resistance
(Note 3)
RON
VIS = 2.4 V, IIS = 15 mA
4.5
35
50
Switch ON
5.5
1.5
mA
ICC
VIN = VCC or GND
IOUT = 0
Switch OFF
5.5
10
µA
Quiescent supply current
∆ICC
VIN = 3.4 V (one input)
(Note 4)
5.5
2.5
mA
Note 2: Typical values are at VCC = 5 V and Ta = 25°C.
Note 3: Measured by the voltage drop between A and B pins at the indicated current through the switch. On
resistance is determined by the lower of the voltages on the two (A or B) pins.
Note 4: Quiescent supply current at VCC = 3.4 V will be sum of ICC and ∆ICC.
AC Characteristics (Ta
==== −−−−40~85°C)
Characteristics
Symbol
Test Condition
VCC (V)
Min
Max
Unit
Propagation delay time
(bus to bus)
tpLH
tpHL
Figure 1, Figure 2
(Note 5)
4.5
0.25
ns
Output enable time
tpZL
tpZH
Figure 1, Figure 3
4.5
4.5
ns
Output disable time
tpLZ
tpHZ
Figure 1, Figure 3
4.5
5.5
ns
Note 5: The propagation delay time is calculated by the RC (on-resistance and load capacitance) time constant.
Capacitive Characteristics (Ta
==== 25°C)
Characteristics
Symbol
Test Condition
VCC (V)
Typ.
Unit
Control pin input capacitance
CIN
(Note 6)
5.0
3
pF
Switch terminal capacitance
CI/O
OE
= GND
(Note 6)
5.0
10
pF
Note 6: This parameter is guaranteed by design.


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