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74HCT75D 数据表(PDF) 7 Page - NXP Semiconductors |
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74HCT75D 数据表(HTML) 7 Page - NXP Semiconductors |
7 / 7 page December 1990 7 Philips Semiconductors Product specification Quad bistable transparent latch 74HC/HCT75 AC WAVEFORMS Fig.6 Waveforms showing the data input (nD) to output (nQ) propagation delays and the output transition times. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.7 Waveforms showing the data input (nD) to output (nQ) propagation delays and the output transition times. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.8 Waveforms showing the latch enable input (LEn-n) pulse width, the latch enable input to outputs (nQ, nQ) propagation delays and the output transition times. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines”. Fig.9 Waveforms showing the data set-up and hold times for nD input to LEn-n input. The shaded areas indicate when the input is permitted to change for predictable output performance. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. |
类似零件编号 - 74HCT75D |
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类似说明 - 74HCT75D |
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