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74HC594N 数据表(PDF) 6 Page - NXP Semiconductors |
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74HC594N 数据表(HTML) 6 Page - NXP Semiconductors |
6 / 10 page December 1991 6 Philips Semiconductors Product specification 8-bit shift register with output register 74HC/HCT594 DC CHARACTERISTICS FOR 74HC For the DC characteristics, see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: parallel outputs, bus driver; serial output, standard. ICC category: MSI. AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF. SYMBOL PARAMETER Tamb (°C) UNIT TEST CONDITIONS +25 −40 to +85 −40 to +125 VCC (V) WAVEFORMS min. typ. max. min. max. min. max. tPHL/tPLH propagation delay SHCP to Q7’ − − − 44 16 14 150 30 26 − − − 185 37 31 − − − 225 45 38 ns ns ns 2.0 4.5 6.0 Fig.7 propagation delay STCP to Qn − − − 44 16 14 150 30 26 − − − 185 37 31 − − − 225 45 38 ns ns ns 2.0 4.5 6.0 Fig.8 tPHL propagation delay SHR to Q7’ − − − 39 14 12 150 30 26 − − − 185 37 31 − − − 225 45 38 ns ns ns 2.0 4.5 6.0 Fig.11 propagation delay STR to Qn − − − 39 14 12 125 25 21 − − − 155 31 26 − − − 185 37 31 ns ns ns 2.0 4.5 6.0 Fig.12 tW shift clock pulse width HIGH or LOW 80 16 14 10 4 3 − − − 100 20 17 − − − 120 24 20 − − − ns ns ns 2.0 4.5 6.0 Fig.7 storage clock pulse width HIGH or LOW 80 16 14 10 4 3 − − − 100 20 17 − − − 120 24 20 − − − ns ns ns 2.0 4.5 6.0 Fig.8 shift and storage reset pulse width HIGH or LOW 80 16 14 14 5 4 − − − 100 20 17 − − − 120 24 20 − − − ns ns ns 2.0 4.5 6.0 Fig.11 and Fig.12 tsu set-up time Ds to SHCP 100 20 17 10 4 3 − − − 125 25 21 − − − 150 30 26 − − − ns ns ns 2.0 4.5 6.0 Fig.9 set-up time SHR to STCP 100 20 17 14 5 4 − − − 125 25 21 − − − 150 30 26 − − − ns ns ns 2.0 4.5 6.0 Fig.10 set-up time SHCP to STCP 100 20 17 17 6 5 − − − 125 25 21 − − − 150 30 26 − − − ns ns ns 2.0 4.5 6.0 Fig.8 |
类似零件编号 - 74HC594N |
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类似说明 - 74HC594N |
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