1.

General description

The 74HC4040; 74HCT4040 are high-speed Si-gate CMOS devices and are pin

compatible with the HEF4040B series. They are specified in compliance with JEDEC

standard no. 7A.

The 74HC4040; 74HCT4040 are 12-stage binary ripple counters with a clock input (CP),

an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to

Q11). The counter advances on the HIGH-to-LOW transition of CP.

A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the

state of CP.

Each counter stage is a static toggle flip-flop.

2.

Features

−40 °Cto+85 °C and from −40 °C to +125 °C

3.

Applications

4.

Quick reference data

74HC4040; 74HCT4040

12-stage binary ripple counter

Rev. 03 — 14 September 2005

Product data sheet

Table 1:

Quick reference data

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Type 74HC4040

propagation delay

CP to Q0

-

14

-

ns

Qn to Qn+1

-

8

-

ns