74HC174PW datasheet(2/13 Pages) PHILIPS

部件名	74HC174PW

功能描述	Hex D-type flip-flop with reset; positive-edge trigger

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制造商	PHILIPS [NXP Semiconductors]

网页	http://www.nxp.com

标志

2 / 13 page

1998 Jul 08

2

Philips Semiconductors

Product speciﬁcation

Hex D-type ﬂip-ﬂop with reset; positive-edge trigger

74HC/HCT174

FEATURES

• Six edge-triggered D-type flip-flops

• Asynchronous master reset

• Output capability: standard

• ICC category: MSI

GENERAL DESCRIPTION

The 74HC/HCT174 are high-speed Si-gate CMOS devices

and are pin compatible with low power Schottky TTL

(LSTTL). They are specified in compliance with JEDEC

standard no. 7A.

The 74HC/HCT174 have six edge-triggered D-type

flip-flops with individual D inputs and Q outputs. The

common clock (CP) and master reset (MR) inputs load and

reset (clear) all flip-flops simultaneously.

The register is fully edge-triggered. The state of each D

input, one set-up time prior to the LOW-to-HIGH clock

transition, is transferred to the corresponding output of the

flip-flop.

A LOW level on the MR input forces all outputs LOW,

independently of clock or data inputs.

The device is useful for applications requiring true outputs

only and clock and master reset inputs that are common to

all storage elements.

QUICK REFERENCE DATA

GND = 0 V; Tamb=25 °C; tr =tf = 6 ns

Notes

1. CPD is used to determine the dynamic power dissipation (PD in µW):

PD =CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where:

fi = input frequency in MHz

fo = output frequency in MHz

∑ (CL × VCC2 × fo) = sum of outputs

CL = output load capacitance in pF

VCC = supply voltage in V

2. For HC the condition is VI = GND to VCC

For HCT the condition is VI = GND to VCC − 1.5 V

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

HC

HCT

tPHL/ tPLH

propagation delay

CL = 15 pF; VCC =5 V

CP to Qn

17

18

ns

MR to Qn

13

17

ns

fmax

maximum clock frequency

99

69

MHz

CI

input capacitance

3.5

pF

CPD

power dissipation

capacitance per flip-flop

notes 1 and 2

17

pF

类似零件编号 - 74HC174PW

制造商	部件名	数据表	功能描述
Nexperia B.V. All right...	74HC174PW	255Kb / 14P	Hex D-type flip-flop with reset; positive-edge trigger Rev. 6 - 1 September 2021
	74HC174PW-Q100	730Kb / 16P	Hex D-type flip-flop with reset; positive-edge trigger
	74HC174PW-Q100	252Kb / 14P	Hex D-type flip-flop with reset; positive-edge trigger Rev. 2 - 26 February 2021

More results

类似说明 - 74HC174PW

制造商	部件名	数据表	功能描述
Integral Corp.	IN74LV174	50Kb / 6P	Hex D-type flip-flop with reset; positive edge-trigger
KODENSHI_AUK CORP.	KK74LV174	294Kb / 6P	Hex D-type flip-flop with reset; positive edge-trigger
Nexperia B.V. All right...	74HC174-Q100	730Kb / 16P	Hex D-type flip-flop with reset; positive-edge trigger
NXP Semiconductors	74LV174	121Kb / 14P	Hex D-type flip-flop with reset; positive-edge trigger 1998 May 20
Nexperia B.V. All right...	74HCT174-Q100	252Kb / 14P	Hex D-type flip-flop with reset; positive-edge trigger Rev. 2 - 26 February 2021
Nexperia B.V. All right...	74HCT174	255Kb / 14P	Hex D-type flip-flop with reset; positive-edge trigger Rev. 6 - 1 September 2021
NXP Semiconductors	74HC273-Q100	147Kb / 19P	Octal D-type flip-flop with reset; positive-edge trigger Rev. 1-19 June 2013
Nexperia B.V. All right...	74LVC273-Q100	715Kb / 16P	Octal D-type flip-flop with reset; positive-edge trigger
NXP Semiconductors	74AHC273	92Kb / 20P	Octal D-type flip-flop with reset; positive-edge trigger 1999 Sep 01
Nexperia B.V. All right...	74HC175-Q100	747Kb / 18P	Quad D-type flip-flop with reset; positive-edge trigger