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74HCT109PW 数据表(PDF) 7 Page - NXP Semiconductors

部件名 74HCT109PW
功能描述  Dual JK flip-flop with set and reset; positive-edge trigger
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

74HCT109PW 数据表(HTML) 7 Page - NXP Semiconductors

  74HCT109PW Datasheet HTML 1Page - NXP Semiconductors 74HCT109PW Datasheet HTML 2Page - NXP Semiconductors 74HCT109PW Datasheet HTML 3Page - NXP Semiconductors 74HCT109PW Datasheet HTML 4Page - NXP Semiconductors 74HCT109PW Datasheet HTML 5Page - NXP Semiconductors 74HCT109PW Datasheet HTML 6Page - NXP Semiconductors 74HCT109PW Datasheet HTML 7Page - NXP Semiconductors 74HCT109PW Datasheet HTML 8Page - NXP Semiconductors 74HCT109PW Datasheet HTML 9Page - NXP Semiconductors  
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1997 Nov 25
7
Philips Semiconductors
Product specification
Dual JK flip-flop with set and reset;
positive-edge trigger
74HC/HCT109
AC WAVEFORMS
Fig.6
Waveforms showing the clock (nCP) to output (nQ, nQ) propagation delays, the clock pulse width, the nJ,
nK to nCP set-up, the nCP to nJ, nK hold times, the output transition times and the maximum clock pulse
frequency.
The shaded areas indicate when the
input is permitted to change for
predictable output performance.
handbook, full pagewidth
MBK216
VM
(1)
nCP INPUT
nSD INPUT
nRD INPUT
nQ OUTPUT
nQ OUTPUT
VM
(1)
VM
(1)
VM
(1)
VM
(1)
tW
trem
trem
tW
tPHL
tPLH
tPLH
tPHL
Fig.7
Waveforms showing the set (nSD) and reset (nRD) input to output (nQ, nQ) propagation delays, the set
and reset pulse widths and the nRD, nSD to nCP removal time.
(1) HC: VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.


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