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74ABT651PW 数据表(PDF) 6 Page - NXP Semiconductors |
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74ABT651PW 数据表(HTML) 6 Page - NXP Semiconductors |
6 / 7 page Philips Semiconductors Product specification 74ABT651 Octal transceiver/register, inverting (3-State) 1995 Sep 06 6 AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER WAVEFORM Tamb = +25oC VCC = +5.0V Tamb = -40 to +85oC VCC = +5.0V ±0.5V UNIT Min Typ Min ts(H) ts(L) Setup time An to CPAB, Bn to CPBA 4 3.0 3.0 1.2 0.8 3.0 3.0 ns th(H) th(L) Hold time An to CPAB, Bn to CPBA 4 0.0 0.0 –0.8 –0.9 0.0 0.0 ns tw(H) tw(L) Pulse width, High or Low CPAB or CPBA 1 4.0 4.0 1.2 1.1 4.0 4.0 ns AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V VM VM VM VM VM 1/fMAX tw(H) tw(L) tPHL tPLH CPBA or CPAB An or Bn SA00087 Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency An or Bn VM VM Bn or An VM VM tPLH tPHL SA00016 Waveform 2. Propagation Delay, An to Bn or Bn to An VM tPHL tPLH VM VM VM SBA or SAB An or Bn SA00089 Waveform 3. Propagation Delay, SBA to An or SAB to Bn VM An or Bn VM VM VM VM VM CPBA or CPAB ts(H) th(H) ts(L) th(L) SA00090 NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. tW(L) Waveform 4. Data Setup and Hold Times OEBA VM tPZH tPHZ 0V VOH –0.3V VM VM An or Bn OEAB SA00100 Waveform 5. 3–State Output Enable Time to High Level and Output Disable Time from High Level tPZL tPLZ VOL +0.3V VM VM VM OEBA An or Bn OEAB SA00101 0V Waveform 6. 3–State Output Enable Time to Low Level and Output Disable Time from Low Level |
类似零件编号 - 74ABT651PW |
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类似说明 - 74ABT651PW |
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