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SI4136-F-GM 数据表(PDF) 9 Page - Silicon Laboratories |
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SI4136-F-GM 数据表(HTML) 9 Page - Silicon Laboratories |
9 / 34 page Si4136/Si4126 Rev. 1.4 9 RF1 Harmonic Suppression Second Harmonic — –28 –20 dBc RF2 Harmonic Suppression — –23 –20 dBc IF Harmonic Suppression — –26 –20 dBc RFOUT Power Level ZL = 50 Ω, RF1 active –7 –3.5 –0.5 dBm RFOUT Power Level ZL = 50 Ω, RF2 active –7 –3.5 –0.5 dBm IFOUT Power Level ZL = 50 Ω –7 –4 0 dBm RF1 Output Reference Spurs Offset = 1 MHz — –63 — dBc Offset = 2 MHz — –68 — dBc Offset = 3 MHz — –70 — dBc RF2 Output Reference Spurs Offset = 1 MHz — –63 — dBc Offset = 2 MHz — –68 — dBc Offset = 3 MHz — –70 — dBc Powerup Request to Synthesizer Ready3 Time tpup Figures 4, 5 fφ > 500 kHz — 80 100 µs Powerup Request to Synthesizer Ready3 Time tpup Figures 4, 5 fφ ≤ 500 kHz —40/fφ 50/fφ Powerdown Request to Synthesizer Off4 Time tpdn Figures 4, 5 — — 100 ns Table 5. RF and IF Synthesizer Characteristics (Continued) (VDD = 2.7 to 3.6 V, TA = –40 to 85 °C) Parameter1 Symbol Test Condition Min Typ Max Unit Notes: 1. fφ(RF) = 1 MHz, fφ(IF) = 1 MHz, RF1 = 2.4 GHz, RF2 = 2.1 GHz, IFOUT = 800 MHz, LPWR = 0, for all parameters unless otherwise noted. 2. RF VCO tuning range limits are fixed by inductance of internally bonded wires. 3. From powerup request (PWDN ↑ or SEN↑ during a write of 1 to bits PDIB and PDRB in Register 2) to RF and IF synthesizers ready (settled to within 0.1 ppm frequency error). 4. From powerdown request (PWDN ↓, or SEN↑ during a write of 0 to bits PDIB and PDRB in Register 2) to supply current equal to IPWDN. |
类似零件编号 - SI4136-F-GM |
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类似说明 - SI4136-F-GM |
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