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74ALVCH16973DLRG4 数据表(PDF) 1 Page - Texas Instruments |
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74ALVCH16973DLRG4 数据表(HTML) 1 Page - Texas Instruments |
1 / 13 page www.ti.com FEATURES DESCRIPTION/ORDERING INFORMATION DGG, DGV, OR DL PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 TOE D1 A1 GND Y1 A2 VCC D2 A3 GND Y2 A4 D3 A5 GND Y3 A6 VCC D4 A7 GND A8 Y4 LE DIR B1 Q1 GND B2 Q2 VCC B3 Q3 GND B4 Q4 B5 Q5 GND B6 Q6 VCC B7 Q7 GND Q8 B8 LOE SN74ALVCH16973 8-BIT BUS TRANSCEIVER AND TRANSPARENT D-TYPE LATCH WITH FOUR INDEPENDENT BUFFERS SCES435B – APRIL 2003 – REVISED SEPTEMBER 2004 • Member of the Texas Instruments Widebus™ Family • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors • Latch-Up Performance Exceeds 250 mA Per JESD 17 • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) This device contains four independent noninverting buffers and an 8-bit noninverting bus transceiver and D-type latch, designed for 1.65-V to 3.6-V VCC operation. The SN74ALVCH16973 is particularly suitable for demultiplexing an address/data bus into a dedicated address bus and dedicated data bus. The device is used where there is asynchronous bidirectional communication between the A and B data bus, and the address signals are latched and buffered on the Q bus. The control-function implementation minimizes external timing requirements. This device can be used as one 4-bit buffer, one 8-bit transceiver, or one 8-bit latch. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The transceiver output-enable (TOE) input can be used to disable the transceivers so that the A and B buses effectively are isolated. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING Tube SN74ALVCH16973DL SSOP - DL ALVCH16973 Tape and reel SN74ALVCH16973DLR -40 °C to 85°C TSSOP - DGG Tape and reel SN74ALVCH16973DGGR ALVCH16973 TVSOP - DGV Tape and reel SN74ALVCH16973DGVR VH973 (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 2003–2004, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
类似零件编号 - 74ALVCH16973DLRG4 |
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类似说明 - 74ALVCH16973DLRG4 |
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