5

®

DAC667

output 1LSB below full scale.

Input coding for bipolar analog outputs is bipolar offset

below positive full scale, and zero occurs for an input code

The DAC667 can be used with two’s complement coding if

a logic inverter is used ahead of the MSB input (DB11).

INTERNAL/EXTERNAL REFERENCE USE

DAC667 contains a +10V reference which is trimmed to

typically

±0.2% and tested and guaranteed to ±1%. V

REF OUT

with a nominal value of 50

Ω. A trim potentiometer with a

nominal value of 100

Ω can be used to provide adjustment to

zero gain error. If an external 10.000V reference is used, it

may be necessary to increase the trim range slightly.

The reference output may be used to drive external loads,

sourcing up to 5mA. The load current should be constant,

otherwise the gain (and bipolar offset, if connected) of the

converter will vary.

It is possible to use references other than +10V. The recom-

mended range of reference voltage is from +8V to +11V,

which allows both 8.192V and 10.24V ranges to be used.

The DAC667 is optimized for fixed-reference applications.

If the reference voltage is expected to vary over a wide

range, a CMOS multiplying D/A is a better choice.

GAIN AND OFFSET ADJUSTMENTS

Figures 2 and 3 illustrate the relationship of offset and gain

adjustments to a unipolar- and a bipolar-connected DAC667.

Offset should be adjusted first to avoid interaction of adjust-

ments.

FIGURE 2. Relationship of Offset and Gain Adjustments for

a Unipolar D/A Converter.

+ Full Scale

All Bits

Logic 0

1LSB

Range of

Offset Adj.

Offset Adjust Translates the Line

Digital Input

All Bits

Logic 1

Range of

Gain Adj.

Gain Adjust

Rotates the Line

≈ ±0.4%

≈ ±1%

+ Full Scale

All Bits

Logic 0

1LSB

Range of

Offset Adjust

Offset Adj.

Translates

the Line

Digital Input

All Bits

Logic 1

Full Scale

Range

Gain Adjust

Rotates the Line

– Full Scale

MSB on All

Others Off

Bipolar

Offset

Range of

Gain Adj.

≈ ±1%

≈ ±0.4%

Gain Adjustment

For either unipolar or bipolar operation, apply the digital

input that gives the maximum positive voltage output. Ad-

just the gain potentiometer for this positive full scale volt-

age. See Table II for calibration values.

SETTLING TIME

PERFORMANCE

The switches, reference and output amplifier of the DAC667

are designed for optimum settling time performance (Figure

–10V to +10V to –10V, for data input 000

full scale (+10V) for an output transition from –10V to

+10V. Figure 4c shows the settling time response at minus

Offset Adjustment

For unipolar (USB) operation, apply the digital input code

that should produce zero voltage output and adjust the offset

potentiometer for zero output. For bipolar (BOB, BTC)

operation, apply the digital input code that produces the

maximum negative output voltage and adjust the offset

potentiometer for minus full scale voltage. See Table II for

calibration values and codes.

ANALOG OUTPUT

0 to +5V

0 to +10V

+4.9987V

+9.9976V

+2.4987V

+4.9976V

+9.9951V

+2.5000V

+5.0000V

0.0000V

0.0000V

0.0000V

+2.4987V

+4.9976V

–0.0013V

–0.0024V

–0.0049V

0.0000V

0.0000V

–2.5000V

–5.0000V

–10.0000V

1LSB

1.22mV

2.44mV

1.22mV

2.44mV

4.88mV

DIGITAL

INPUT

TABLE II. Calibration Values.

FIGURE 3. Relationship of Offset and Gain Adjustments for

a Bipolar D/A Converter.