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AM93LC56INA 数据表(PDF) 1 Page - Anachip Corp

部件名 AM93LC56INA
功能描述  2048-bits Serial Electrically Erasable PROM
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制造商  ANACHIP [Anachip Corp]
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标志 ANACHIP - Anachip Corp

AM93LC56INA 数据表(HTML) 1 Page - Anachip Corp

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2048-bits Serial Electrically Erasable PROM
AM93LC56
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of
this product. No rights under any patent accompany the sale of the product.
Rev.A1 Oct 20, 2003
1/10
ATC
Features
• State-of-the-art architecture
- Non-volatile data storage
- Standard voltage and low voltage operation
Vcc: 2.7V ~ 5.5V
- Full TTL compatible inputs and outputs
- Auto increment read for efficient data dump
• Hardware and software write protection
- Defaults to write-disabled state at power up
- Software instructions for write-enable/disable
- VCC level verification before self-timed
programming cycle
Advanced
low
voltage
CMOS
EEPROM
technology
• Versatile, easy-to-use interface
- Self-timed programming cycle
- Automatic erase-before-write
- Programming status indicator
- Word and chip erasable
- Stop SK anytime for power savings
• Durability and reliability
- 40 years data retention
- Minimum of 1M write cycles per word
- Unlimited read cycles
- ESD protection
Connection Diagram
1
2
3
4
8
7
6
5
VCC
GND
NC
ORG
CS
SK
PDIP-8L / SOP-8L
DO
DI
1
2
3
4
8
7
6
5
VCC
GND
NC
ORG
CS
SK
Rotated SOP-8L
DO
DI
General Description
The AM93LC56 is the 2048-bit non-volatile serial
EEPROM. It is manufactured by using ATC's
advanced
CMOS
EEPROM
technology.
The
AM93LC56 provides efficient non-volatile read/write
memory arranged as 128 words of 16 bits each
when the ORG Pin is connected to VCC and 256
words of 8 bits each when it is tied to ground. The
instruction set includes read, write, and write
enable/disable functions. The data out pin (DO)
indicates the status of the device during the
self-timed non-volatile programming cycle.
The self-timed write cycle includes an automatic
erase-before-write capability. Only when the chip is
in the WRITE ENABLE state and proper VCC
operation range is the WRITE instruction accepted
and thus to protect against inadvertent writes. Data
is written in 16 bits per write instruction into the
selected register. If Chip Select (CS) is brought
HIGH after initiation of the write cycle, the Data
Output (DO) pin will indicate the READY/BUSY
status of the chip.
The AM93LC56 is available in space-saving 8-lead
PDIP, 8-lead SOP and rotated 8-lead SOP package.
Pin Assignments
Name
Description
CS
Chip Select
SK
Serial Data Clock
DI
Serial Data Input
DO
Serial Data Output
GND
Ground
VCC
Power Supply
NC
No Connection
ORG
Internal Organization
Ordering Information
Type
Package
56: 2K
S : SOP-8L
GS8: SOP-8L,G type
N : PDIP-8L
Temp. grade
AM 93 L C 56 X XX X
Packing
Blank :
C
o
70
~
C
o
0
+
I
:
C
o
85
~
C
o
40
+
V
:
C
o
125
~
C
o
40
+
Blank : Tube
A : Taping
Operating Voltage
LC : 2.7~5.5V,CMOS


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