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NE1617ADS 数据表(PDF) 6 Page - NXP Semiconductors |
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NE1617ADS 数据表(HTML) 6 Page - NXP Semiconductors |
6 / 17 page Philips Semiconductors Product data sheet NE1617A Temperature monitor for microprocessor systems 2004 Oct 05 6 SMBus INTERFACE AC SPECIFICATIONS1 VDD = 3.0 V to 3.6 V2; Tamb = 0 _C to +125 _C unless otherwise noted. These specifications are guaranteed by design and not tested in production. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT VIH Logic input high voltage for STBY, SCLK, SDATA VDD = 3 V to 5.5 V 2.2 V VIL Logic input low voltage for STBY, SCLK, SDATA VDD = 3 V to 5.5 V 0.8 V IOL Logic output low sink current for ALERT SDATA VOL = 0.4 V VOL = 0.6 V 1.0 6.0 mA mA IIH & IIL Logic input current VIN = VDD or GND –1.0 1.0 µA CIN SMBus input capacitance for SCLK,SDATA 5 pF fSCLK SCLK operating frequency See Figure 4 0 100 kHz tLOW SCLK low time See Figure 4 4.7 5.0 µs tHIGH SCLK high time See Figure 4 4.0 5.0 µs tBUF SMBus free time. Delay from SDA stop to SDA start See Figure 4 4.7 µs tHD:STA Hold time of start condition. Delay from SDA start to first SCL H–L See Figure 4 4.0 µs tHD:DAT Hold time of data. Delay from SCL H–L to SDA edges See Figure 4 0 ns tSU:DAT Set-up time of data. Delay from SDA edges to SCL L–H See Figure 4 250 ns tSU:STA Set-up time of repeat start condition. Delay from SCL L–H to restart SDA See Figure 4 250 ns tSU:STO Set-up time of stop condition. Delay from SCL L–H to SDA stop See Figure 4 4.0 µs tF Fall time of SCL and SDA See Figure 4 1.0 µs NOTES: 1. The NE1617A does not include the SMBus timeout capability (tLOW:SEXT and tLOW:MEXT). 2. Device operation between 3.0 V to 5.5 V is allowed, but parameters may be outside the limit shown in table. tBUF P S SCLK SDATA SL01204 tHD:STA SP tLOW tR tF tHD:STA tHD:DAT tHIGH tSU:DAT tSU:STA tSU:STO Figure 4. Timing measurements. |
类似零件编号 - NE1617ADS |
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类似说明 - NE1617ADS |
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