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LM27964SQX-I 数据表(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 LM27964SQX-I
功能描述  White LED Driver System with I2C Compatible Brightness Control
Download  13 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

LM27964SQX-I 数据表(HTML) 4 Page - National Semiconductor (TI)

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Electrical Characteristics (Notes 2, 8) (Continued)
Limits in standard typeface are for T
J = 25˚C, and limits in boldface type apply over the full operating temperature range. Un-
less otherwise specified: V
IN = 3.6V; VDxA = 0.4V; VDxB = 0.4V; VDKEY = 0.4V; RSETA =RSETB =RSETK = 16.9k
Ω; BankA,
BankB, and DKEY = Fullscale Current; ENA, ENB, ENK Bits = “1”; C1=C2=1.0µF, C
IN=COUT=2.2µF; Specifications related to
output current(s) and current setting pins (I
Dxx and ISETx) apply to BankA, BankB and DKEY. (Note 9)
Symbol
Parameter
Condition
Min
Typ
Max
Units
V
HR
Current Source Headroom Voltage
Requirement
(Note 11)
I
Dxx = 95% xIDxx (nom.)
(I
Dxx (nom)
≈ 15mA)
BankA and/or BankB Full-Scale
Gain = 3/2, ENA and/or ENB = "1"
180
mV
I
DKEY = 95% xIDKEY (nom.)
(I
DKEY (nom)
≈ 60mA)
DKEY Full-Scale
Gain = 3/2, ENK = "1"
180
I
Dxx-MATCH LED Current Matching
(Note 12)
0.2
2
%
I
Q
Quiescent Supply Current
Gain = 1.5x, No Load
1.3
1.7
mA
I
SD
Shutdown Supply Current
All ENx bits = "0"
3.0
5
µA
V
SET
I
SET Pin Voltage
2.7V
≤ V
IN
≤ 5.5V
1.25
V
I
DxA-B /
I
SETA-B
Output Current to Current Set
Ratio BankA and BankB
200
I
DKEY /
I
SETK
Output Current to Current Set
Ratio DKEY
800
f
SW
Switching Frequency
500
700
900
kHz
t
START
Start-up Time
P
OUT = 90% steady state
250
µs
f
PWM
Internal Diode Current PWM
Frequency
LM27964SQ-I
10
kHz
LM27964SQ-A
23
D.C. Step Diode Current Duty Cycle Step
1/16
Fullscale
I
2C Compatible Interface Voltage Specifications (SCL, SDIO, VIO)
V
IO
Serial Bus Voltage Level
1.8
V
IN
V
V
IL
Input Logic Low "0"
2.7V
≤ V
IN
≤ 5.5V
0
0.27 x
V
IO
V
V
IH
Input Logic High "1"
2.7V
≤ V
IN
≤ 5.5V
0.73 x
V
IO
V
IO
V
V
OL
Output Logic Low "0"
I
LOAD = 2mA
400
mV
I
2C Compatible Interface Timing Specifications (SCL, SDIO, VIO)(Note 13)
t
1
SCL (Clock Period)
2.5
µs
t
2
Data In Setup Time to SCL High
100
ns
t
3
Data Out stable After SCL Low
0
ns
t
4
SDIO Low Setup Time to SCL Low
(Start)
100
ns
t
5
SDIO High Hold Time After SCL
High (Stop)
100
ns
20138113
www.national.com
4


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