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SN74HC112DT 数据表(PDF) 3 Page - Texas Instruments

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部件名 SN74HC112DT
功能描述  DUAL J-NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

SN74HC112DT 数据表(HTML) 3 Page - Texas Instruments

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SN54HC112, SN74HC112
DUAL JK NEGATIVEEDGETRIGGERED FLIPFLOPS
WITH CLEAR AND PRESET
SCLS099F − DECEMBER 1982 − REVISED SEPTEMBER 2003
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range
Supply voltage range, VCC
−0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1)
±20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1)
±20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC)
±25 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND
±50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θJA (see Note 2): D package
73
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
67
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
−65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54HC112
SN74HC112
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
UNIT
VCC
Supply voltage
2
5
6
2
5
6
V
VCC = 2 V
1.5
1.5
VIH
High-level input voltage
VCC = 4.5 V
3.15
3.15
V
VIH
High-level input voltage
VCC = 6 V
4.2
4.2
V
VCC = 2 V
0.5
0.5
VIL
Low-level input voltage
VCC = 4.5 V
1.35
1.35
V
VIL
Low-level input voltage
VCC = 6 V
1.8
1.8
V
VI
Input voltage
0
VCC
0
VCC
V
VO
Output voltage
0
VCC
0
VCC
V
VCC = 2 V
1000
1000
tt‡
Input transition (rise and fall) time
VCC = 4.5 V
500
500
ns
tt‡
Input transition (rise and fall) time
VCC = 6 V
400
400
ns
TA
Operating free-air temperature
−55
125
−40
85
°C
‡ If this device is used in the threshold region (from VILmax = 0.5 V to VIHmin = 1.5 V), there is a potential to go into the wrong state from induced
grounding, causing double clocking. Operating with the inputs at tt = 1000 ns and VCC = 2 V does not damage the device; however, functionally,
the CLK inputs are not ensured while in the shift, count, or toggle operating modes.
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.


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