数据搜索系统,热门电子元器件搜索 |
|
AD7450ABRT-REEL7 数据表(PDF) 11 Page - Analog Devices |
|
AD7450ABRT-REEL7 数据表(HTML) 11 Page - Analog Devices |
11 / 28 page AD7440/AD7450A Rev. B | Page 11 of 28 Positive Gain Error This is the deviation of the last code transition (011...110 to 011...111) from the ideal VIN+ – VIN– (i.e., +VREF − 1 LSB), after the zero code error has been adjusted out. Negative Gain Error This is the deviation of the first code transition (100...000 to 100...001) from the ideal VIN+ − VIN– (i.e., –VREF + 1 LSB), after the zero code error has been adjusted out. Track-and-Hold Acquisition Time The track-and-hold acquisition time is the minimum time required for the track-and-hold amplifier to remain in track mode for its output to reach and settle to within 0.5 LSB of the applied input signal. Power Supply Rejection Ratio (PSRR) The power supply rejection ratio is the ratio of the power in the ADC output at full-scale frequency, f, to the power of a 100 mV p-p sine wave applied to the ADC VDD supply of frequency fS. The frequency of this input varies from 1 kHz to 1 MHz. PSRR (dB) = 10log(Pf/PfS) Pf is the power at frequency f in the ADC output; Pfs is the power at frequency fS in the ADC output. |
类似零件编号 - AD7450ABRT-REEL7 |
|
类似说明 - AD7450ABRT-REEL7 |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |