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MC100ES6221AE 数据表(PDF) 5 Page - Freescale Semiconductor, Inc |
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MC100ES6221AE 数据表(HTML) 5 Page - Freescale Semiconductor, Inc |
5 / 12 page Advanced Clock Drivers Devices Freescale Semiconductor 5 MC100ES6221 Table 6. ECL DC Characteristics (VEE = –2.5 V ± 5% or VEE = –3.3 V ± 5%, VCC = GND, TJ = 0°C to + 110°C) Symbol Characteristics Min Typ Max Unit Condition Clock Input Pair CLK0, CLK0 (ECL differential signals) VPP Differential Input Voltage(1) 1. VPP (DC) is the minimum differential input voltage swing required to maintain device functionality. 0.1 1.3 V Differential operation VCMR Differential Cross Point Junction to top of Package Voltage(2) 2. VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR (DC) range and the input swing lies within the VPP (DC) specification. VEE + 1.0 –0.3 V Differential operation IIN Input Current(1) ±100 µAVIN = VIL or VIN = VIH Clock Inputs (ECL single ended signals) VIH Input Voltage High –1.165 –0.880 V VIL Input Voltage Low –1.810 –1.475 V IIN Input Current(3) 3. Inputs have internal pullup/pulldown resistors which affect the input current. ±100 µAVIN = VIL or VIN = VIH ECL Clock Outputs (Q0–A19, Q0–Q19) VOH Output High Voltage –1.1 –1.005 –0.7 V IOH = –30 mA(4) 4. Equivalent to a termination of 50 Ω to VTT. VOL Output Low Voltage –1.9 –1.705 –1.4 V IOL = –5 mA(4) Supply Current and VBB IEE(5) 5. ICC calculation: ICC = (number of differential output used) x (IOH + IOL) + IEE ICC = (number of differential output used) x (VOH – VTT) ÷ Rload + (VOL – V TT) ÷ Rload + IEE. Maximum Quiescent Supply Current without Output Termination Current 84 160 mA VEE pins VBB Output Reference Voltage (fref < 1.0 GHz) (6) 6. VBB can be used to bias unused single-ended inputs up to a clock reference frequency of 1 GHz. Above 1 GHz, only differential signals should be used with the MC100ES6221. –1.42 –1.20 V IBB = 0.4 mA |
类似零件编号 - MC100ES6221AE |
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类似说明 - MC100ES6221AE |
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