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IZD1521AA 数据表(PDF) 8 Page - Integral Corp. |
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IZD1521AA 数据表(HTML) 8 Page - Integral Corp. |
8 / 13 page CMOS DOT MATRIX LCD DRIVER IZD1520 8 TERMINAL DESCRIPTION Terminal Name Function D0 ÷ D7 Data I/O A0 Select display data or functions. HIGH: Display data LOW : Instructions RES Resets the system and selects the interface type for a 68-port/80-port MPU HIGH: 68-port MPU interface LOW : 80-port MPU interface CS Input. Active low. Effective for an external clock operation model only. OSC1 Chip Select input LOW : Active level sensing E (RD) Read/Write Enable signal when a 68-port MPU is connected. (Active LOW Read Enable signal when an 80-port MPU is connected) R/W (WR) Read/Write Select signal when a 68-port MPU is connected. HIGH: Read Select LOW : Write Select (Active LOW Write Enable input when an 80-port MPU is connected Rising edge sensing) CL Input. Effective for an external clock operation model only. OSC2 External clock input (only effective with external clock types) FR LCD Frame (AC- conversion) signal input/output SEGn Segment output for driving the LCD COMn Common output for driving the LCD M/S Master/Slave Select signal VDD 5V power supply VSS 0V power supply (GND level) V1, V2, V3, V4, V5 Power supplies for driving the LCD. VDD ≥ V 1 ≥ V 2 ≥ V 3 ≥ V 4 ≥ V 5 |
类似零件编号 - IZD1521AA |
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类似说明 - IZD1521AA |
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