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SN74GTLP1395PWE4 数据表(PDF) 8 Page - Texas Instruments |
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SN74GTLP1395PWE4 数据表(HTML) 8 Page - Texas Instruments |
8 / 21 page SN74GTLP1395 TWO 1-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY SCES349C – JUNE 2001 – REVISED NOVEMBER 2001 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics over recommended ranges of supply voltage and operating free-air temperature, VTT = 1.5 V and VREF = 1 V for GTLP (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) EDGE RATE† MIN TYP‡ MAX UNIT tPLH A B Slow 3.3 6.3 ns tPHL A B Slow 1.9 6 ns tPLH A B Fast 2.5 5.3 ns tPHL A B Fast 1.6 4.9 ns tPLH A Y Slow 3.4 9.7 ns tPHL A Y Slow 3.3 9.2 ns tPLH A Y Fast 2.9 8.7 ns tPHL A Y Fast 2.9 8.1 ns tPLH T/C B Slow 3.7 6.7 ns tPHL T/C B Slow 1.8 6.2 ns tPLH T/C B Fast 1.5 5.6 ns tPHL T/C B Fast 1.7 5.5 ns ten OEAB B Slow 3.8 6.4 ns tdis OEAB B Slow 1.9 6.1 ns ten OEAB B Fast 2.8 5.3 ns tdis OEAB B Fast 1.5 5 ns t Rise time B outputs (20% to 80%) Slow 2.4 ns tr Rise time, B outputs (20% to 80%) Fast 1.3 ns tf Fall time B outputs (80% to 20%) Slow 3 ns tf Fall time, B outputs (80% to 20%) Fast 2.7 ns tPLH B Y 1.3 5.3 ns tPHL B Y 1.4 4.5 ns tPLH T/C Y 1 4.5 ns tPHL T/C Y 1.1 4 ns ten OEBY Y 1 4.5 ns tdis OEBY Y 1 4.7 ns † Slow (ERC = H) and Fast (ERC = L) ‡ All typical values are at VCC = 3.3 V, TA = 25°C. |
类似零件编号 - SN74GTLP1395PWE4 |
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类似说明 - SN74GTLP1395PWE4 |
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