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SN74AUC2G53DCTR 数据表(PDF) 2 Page - Texas Instruments |
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SN74AUC2G53DCTR 数据表(HTML) 2 Page - Texas Instruments |
2 / 18 page www.ti.com Y2 A INH Y1 COM 5 2 7 6 1 SW SW NOTE A: For simplicity, the test conditions shown in Figures 1 through 4 and 6 through 10 are for the demultiplexer configuration. Signals may be passed from COM to Y1 (Y2) or from Y1 (Y2) to COM. COM Y Absolute Maximum Ratings (1) SN74AUC2G53 SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH OR 2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER SCES484A – AUGUST 2003 – REVISED MARCH 2005 LOGIC DIAGRAM (POSITIVE LOGIC) SIMPLIFIED SCHEMATIC, EACH SWITCH (SW) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range(2) –0.5 3.6 V VI Input voltage range(2)(3) –0.5 3.6 V VI/O Switch I/O voltage range(2)(3) –0.5 VCC + 0.5 V IIK Control input clamp current VI < 0 –50 mA II/OK I/O port diode current VI/O < 0 or VI/O > VCC ±50 mA IT On-state switch current current VI/O = 0 to VCC ±50 mA Continuous current through VCC or GND ±100 mA DCT package 220 θ JA Package thermal impedance(4) DCU package 227 °C/W YEP/YZP package 102 Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltages are with respect to ground unless otherwise specified. (3) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. (4) The package thermal impedance is calculated in accordance with JESD 51-7. 2 |
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类似说明 - SN74AUC2G53DCTR |
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