数据搜索系统,热门电子元器件搜索 |
|
CDC9843DW 数据表(PDF) 6 Page - Texas Instruments |
|
CDC9843DW 数据表(HTML) 6 Page - Texas Instruments |
6 / 8 page CDC9843 PC MOTHERBOARD CLOCK SYNTHESIZER/DRIVER WITH 3-STATE OUTPUTS SCAS559C – DECEMBER 1995 – REVISED OCTOBER 1996 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION CLOCK DRIVER CIRCUITS Duty Cycle VOLTAGE WAVEFORMS tr tf tc 2.4 V 1.5 V 0.4 V LOAD CIRCUIT From Output Under Test CL = 20 pF (see Note A) 500 Ω NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR v 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. C. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms HCLK-to-HCLK Skew Skew 1.5 V 1.5 V VOH GND VOH GND CPU Clock (HCLK) CPU Clock (HCLK) PCLK-to-PCLK Skew Skew 1.5 V 1.5 V VOH GND VOH GND PCI Clock (PCLK) PCI Clock (PCLK) Offset 1.5 V 1.5 V VOH GND CPU Clock (HCLK) PCI Clock (PCLK) VOH GND Offset HCLK-to-PCLK Offset Figure 2. Waveforms for Calculation of tSkew and toffset |
类似零件编号 - CDC9843DW |
|
类似说明 - CDC9843DW |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |