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TC83220-0027 数据表(PDF) 2 Page - Toshiba Semiconductor |
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TC83220-0027 数据表(HTML) 2 Page - Toshiba Semiconductor |
2 / 16 page TC83220-0027 2003-03-12 2 · Kinds of lock key: “NP” printing mode selectable switch. “Σ” summation mode selectable switch. “5/4” “CUT” “UP” rounding switch. Fixed point mode selectable switch. “0”, “1”, “2”, “3”, “4”, “6”, “F”, “A”. “IC+” item counter mode selectable switch. “GT” grand total memory selectable switch. “SET”, “CAL” tax memory selectable switch. · Duty of display: Duty = 1/17.77 · Leading zero suppression · Trailing zero suppression · Tax calculation: +TAX key is calculation for included tax. −TAX key is calculation for excluded tax. SET selects set mode for tax rate. CAL selects normal calculation mode. Changing lock key from SET to CAL stores number of display to tax memory. Changing lock key from CAL to SET recalls tax rate to display from tax memory. Depression of +TAX following data key at CAL mode performs the calculating included tax. Depression of −TAX following data key at CAL mode performs the calculating excluded tax. Electrical Features · P-MOS output buffer with pull down resistor for direct driving of fluorescent display tube. · Oscillator/clock generator internal to chip. · Key board encoding internal to chip. · Dual in line package. Protection (1) In the overflow condition, all key except “C”, “C/CE”, “CE”, “Feed”, “→” key are inoperative. (2) Key bouncing protection (at 4 MHz clock) Key read in: 15 ms Key off: 40 ms Function Select (1) “10/12” selectable with auto power off mode ON ・・・・・・・・ 10-digit calculated OFF・・・・・・・ 12-digit calculated Speed of Calculation (at 4 MHz clock) (1) Addition 1 + 1 + 31.2 ms (2) Multiplication × 999999999999 = 26.8 ms (3) Division 999999999999 ÷ 1 = 100.6 ms (4) Memory calculation 999999999999 ÷ 1 M + 108.8 ms (5) Percentage calculation 1 × 999999999999% 35.2 ms |
类似零件编号 - TC83220-0027 |
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类似说明 - TC83220-0027 |
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