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AD9929 数据表(PDF) 7 Page - Analog Devices

部件名 AD9929
功能描述  CCD Signal Processor with Precision Timing Generator
Download  64 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9929 数据表(HTML) 7 Page - Analog Devices

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AD9929
Rev. A | Page 7 of 64
TERMINOLOGY
Differential Nonlinearity (DNL)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Thus every
code must have a finite width.“No missing codes guaranteed to
12-bit resolution” indicates that all 4096 codes, respectively,
must be present over all operating conditions.
Peak Nonlinearity
Peak nonlinearity, a full signal-chain specification, refers to the
peak deviation of the output of the AD9929 from a true straight
line. The point used as zero scale occurs 1/2 LSB before the first
code transition. “Positive full scale” is defined as a level 1 and
1/2 LSB beyond the last code transition. The deviation is mea-
sured from the middle of each particular output code to the
true straight line. The error is then expressed as a percentage of
the 2 V ADC full-scale signal. The input signal is always appro-
priately gained up to fill the ADC’s full-scale range.
Total Output Noise
The rms output noise is measured using histogram techniques.
The standard deviation of the ADC output codes is calculated
in LSBs, and represents the rms noise level of the total signal
chain at the specified gain setting. The output noise can be
converted to an equivalent voltage, using the relationship
1 LSB = (ADC full scale/2N codes) when N is the bit resolution
of the ADC. For the AD9929, 1 LSB is 0.5 mV.
Power Supply Rejection (PSR)
The PSR is measured with a step change applied to the supply
pins. The PSR specification is calculated from the change in the
data outputs for a given step change in the supply voltage.


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