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AM29DL320GT90 数据表(PDF) 5 Page - SPANSION |
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AM29DL320GT90 数据表(HTML) 5 Page - SPANSION |
5 / 58 page September 27, 2004 Am29DL320G 3 TABLE OF CONTENTS Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 6 Special Package Handling Instructions .......................................... 7 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9 Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 10 Table 1. Device Bus Operations ...........................................................10 Word/Byte Configuration .............................................................. 10 Requirements for Reading Array Data .........................................10 Writing Commands/Command Sequences .................................. 11 Accelerated Program Operation ...................................................11 Autoselect Functions .................................................................... 11 Simultaneous Read/Write Operations with Zero Latency .........................................................................11 Standby Mode .............................................................................. 11 Automatic Sleep Mode .................................................................11 RESET#: Hardware Reset Pin .....................................................12 Output Disable Mode ...................................................................12 Table 2. Top Boot Sector Addresses ...................................................13 Table 3. Top Boot SecSi TM Sector Addresses ..................................... 14 Table 4. Bottom Boot Sector Addresses ...............................................15 Table 5. Bottom Boot SecSiTM Sector Addresses ................................ 16 Autoselect Mode .......................................................................... 17 Table 6. Autoselect Codes, (High Voltage Method) .............................17 Sector/Sector Block Protection and Unprotection ........................ 18 Table 7. Top Boot Sector/Sector Block Addresses for Protection/Unprotection ...................................................................18 Table 8. Bottom Boot Sector/Sector Block Addresses for Protection/Unprotection ...................................................................18 Write Protect (WP#) .....................................................................19 Temporary Sector Unprotect ........................................................ 19 Figure 1. Temporary Sector Unprotect Operation ................................. 19 Figure 2. In-System Sector Protection/ Sector Unprotection Algorithms ............................................................ 20 SecSi TM (Secured Silicon) Sector Flash Memory Region .................................................................. 21 Factory Locked: SecSi Sector Programmed and Protected At the Factory .........................................................................................21 Customer Lockable: SecSi Sector NOT Programmed or Protected At the Factory ...................................................................................21 Figure 3. SecSi Sector Protect Verify.................................................... 22 Hardware Data Protection ............................................................ 22 Low VCC Write Inhibit .................................................................. 22 Write Pulse “Glitch” Protection .....................................................22 Logical Inhibit ...............................................................................22 Power-Up Write Inhibit .................................................................22 Common Flash Memory Interface (CFI) . . . . . . . 22 Table 9. CFI Query Identification String ................................................ 23 Table 10. System Interface String......................................................... 23 Table 11. Device Geometry Definition .................................................. 24 Table 12. Primary Vendor-Specific Extended Query ............................ 24 Command Definitions . . . . . . . . . . . . . . . . . . . . . . 25 Reading Array Data ...................................................................... 25 Reset Command .......................................................................... 25 Autoselect Command Sequence .................................................. 25 Enter SecSiTM Sector/Exit SecSi Sector Command Sequence ...................................................................26 Byte/Word Program Command Sequence ................................... 26 Unlock Bypass Command Sequence ........................................... 26 Figure 4. Program Operation ................................................................ 27 Chip Erase Command Sequence ................................................. 27 Sector Erase Command Sequence .............................................. 27 Erase Suspend/Erase Resume Commands ................................ 28 Figure 5. Erase Operation .................................................................... 28 Table 13. Command Definitions ........................................................... 29 Write Operation Status . . . . . . . . . . . . . . . . . . . . 30 DQ7: Data# Polling ...................................................................... 30 Figure 6. Data# Polling Algorithm ......................................................... 30 RY/BY#: Ready/Busy# ................................................................. 31 DQ6: Toggle Bit I .......................................................................... 31 Figure 7. Toggle Bit Algorithm .............................................................. 31 DQ2: Toggle Bit II ......................................................................... 32 Reading Toggle Bits DQ6/DQ2 .................................................... 32 DQ5: Exceeded Timing Limits ...................................................... 32 DQ3: Sector Erase Timer ............................................................. 32 Table 14. Write Operation Status ......................................................... 33 Absolute Maximum Ratings . . . . . . . . . . . . . . . . 34 Figure 8. Maximum Negative Overshoot Waveform ............................. 34 Figure 9. Maximum Positive Overshoot Waveform .............................. 34 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 10. ICC1 Current vs. Time (Showing Active and Automatic Sleep Currents).................................................................... 36 Figure 11. Typical ICC1 vs. Frequency................................................... 36 Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 12. Test Setup .......................................................................... 37 Figure 13. Input Waveforms and Measurement Levels ........................ 37 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 14. Read Operation Timings...................................................... 38 Figure 15. Reset Timings...................................................................... 39 Word/Byte Configuration (BYTE#) ............................................... 40 Figure 16. BYTE# Timings for Read Operations .................................. 40 Figure 17. BYTE# Timings for Write Operations .................................. 40 Erase and Program Operations ................................................... 41 Figure 18. Program Operation Timings ................................................ 42 Figure 19. Accelerated Program Timing Diagram ................................ 42 Figure 20. Chip/Sector Erase Operation Timings ................................. 43 Figure 21. Back-to-back Read/Write Cycle Timings ............................. 44 Figure 22. Data# Polling Timings (During Embedded Algorithms) ....... 44 Figure 23. Toggle Bit Timings (During Embedded Algorithms) ............ 45 Figure 24. DQ2 vs. DQ6 ....................................................................... 45 Temporary Sector Unprotect ........................................................ 46 Figure 25. Temporary Sector Unprotect Timing Diagram ..................... 46 Figure 26. Sector/Sector Block Protect and Unprotect Timing Diagram 47 Alternate CE# Controlled Erase and Program Operations ........... 48 Figure 27. Alternate CE# Controlled Write (Erase/Program) Operation Timings ................................................................................ 49 Erase And Programming Performance . . . . . . . 50 Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 50 TSOP And SO Pin Capacitance . . . . . . . . . . . . . . 50 Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 51 FBD063—63-ball Fine-Pitch Ball Grid Array (FBGA) 8 x 14 mm . 51 FBD048—Fine-Pitch Ball Grid Array, 6 x 12 mm ......................... 52 TS 048—Thin Small Outline Package .......................................... 53 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 55 |
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