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74LVC16373ADL 数据表(PDF) 3 Page - NXP Semiconductors |
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74LVC16373ADL 数据表(HTML) 3 Page - NXP Semiconductors |
3 / 17 page 2003 Dec 08 3 Philips Semiconductors Product specification 16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 74LVC16373A; 74LVCH16373A QUICK REFERENCE DATA GND = 0 V; Tamb =25 °C; tr =tf ≤ 2.5 ns Note 1. CPD is used to determine the dynamic power dissipation (PD in µW). a) PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacity in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. ORDERING INFORMATION SYMBOL PARAMETER CONDITIONS TYPICAL UNIT tPHL/tPLH propagation delay Dn to Qn CL = 50 pF; VCC = 3.3 V 3.0 ns propagation delay LE to Qn CL = 50 pF; VCC = 3.3 V 3.4 ns tPZH/tPZL 3-state output enable time OE to Qn CL = 50 pF; VCC = 3.3 V 3.5 ns tPHZ/tPLZ 3-state output disable time OE to Qn CL = 50 pF; VCC = 3.3 V 3.9 ns CI input capacitance 5.0 pF CPD power dissipation per latch VCC = 3.3 V; notes 1 and 2 outputs enabled 15 pF outputs disabled 11 pF TYPE NUMBER TEMPERATURE RANGE PACKAGE PINS PACKAGE MATERIAL CODE 74LVC16373ADGG −40 to +125 °C 48 TSSOP48 plastic SOT362-1 74LVCH16373ADGG −40 to +125 °C 48 TSSOP48 plastic SOT362-1 74LVC16373ADL −40 to +125 °C 48 SSOP48 plastic SOT370-1 74LVCH16373ADL −40 to +125 °C 48 SSOP48 plastic SOT370-1 |
类似零件编号 - 74LVC16373ADL |
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类似说明 - 74LVC16373ADL |
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