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AD8091ART-REEL 数据表(PDF) 11 Page - Analog Devices |
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AD8091ART-REEL 数据表(HTML) 11 Page - Analog Devices |
11 / 16 page –11– AD8091/AD8092 REV. A LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS Power Supply Bypassing Power supply pins are actually inputs and care must be taken so that a noise-free stable dc voltage is applied. The purpose of bypass capacitors is to create low impedances from the supply to ground at all frequencies, thereby shunting or filtering a majority of the noise. Decoupling schemes are designed to minimize the bypassing imped- ance at all frequencies with a parallel combination of capacitors. 0.01 µF or 0.001 µF (X7R or NPO) chip capacitors are critical and should be as close as possible to the amplifier package. Larger chip capacitors, such as the 0.1 µF capacitor, can be shared among a few closely spaced active components in the same signal path. A 10 µF tantalum capacitor is less critical for high-frequency bypassing and, in most cases, only one per board is needed at the supply inputs. Grounding A ground plane layer is important in densely packed PC boards to spread the current minimizing parasitic inductances. However, an understanding of where the current flows in a circuit is critical to implementing effective high-speed circuit design. The length of the current path is directly proportional to the magnitude of parasitic inductances and thus the high-frequency impedance of the path. High-speed currents in an inductive ground return will create an unwanted voltage noise. The length of the high-frequency bypass capacitor leads are most critical. A parasitic inductance in the bypass grounding will work against the low impedance created by the bypass capacitor. Place the ground leads of the bypass capacitors at the same physical location. Because load currents flow from the supplies as well, the ground for the load impedance should be at the same physical location as the bypass capacitor grounds. For the larger value capacitors, which are intended to be effective at lower frequencies, the current return path distance is less critical. Input Capacitance Along with bypassing and ground, high-speed amplifiers can be sensitive to parasitic capacitance between the inputs and ground. A few pF of capacitance will reduce the input impedance at high frequencies, in turn increasing the amplifier’s gain, causing peaking of the frequency response or even oscillations, if severe enough. It is recommended that the external passive components, which are connected to the input pins, be placed as close as possible to the inputs to avoid parasitic capacitance. The ground and power planes must be kept at a distance of at least 0.05 mm from the input pins on all layers of the board. Input-to-Output Coupling The input and output signal traces should not be parallel to mini- mize capacitive coupling between the inputs and output, avoiding any positive feedback. DRIVING CAPACITIVE LOADS A highly capacitive load will react with the output of the amplifiers, causing a loss in phase margin and subsequent peaking or even oscillation, as illustrated in Figures 2 and 3. There are two methods to effectively minimize its effect. 1. Put a small value resistor in series with the output to isolate the load capacitor from the amps’ output stage. 2. Increase the phase margin with higher noise gains or by adding a pole with a parallel resistor and capacitor from –IN to the output. FREQUENCY – MHz 500 0.1 1 10 100 VS = +5V G = +1 RL = 2k CL = 50pF VO = 200mV p-p 8 6 4 2 0 2 4 6 8 10 Figure 2. Closed-Loop Frequency Response: CL = 50 pF 2.60V 2.55V 2.50V 2.45V 2.40V p Figure 3. 200 mV Step Response: CL = 50 pF |
类似零件编号 - AD8091ART-REEL |
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类似说明 - AD8091ART-REEL |
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