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AD5520 数据表(PDF) 4 Page - Analog Devices

部件名 AD5520
功能描述  Per Pin Parametric Measurement Unit/Source Measure Unit
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD5520 数据表(HTML) 4 Page - Analog Devices

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REV. A
–4–
AD5520
TIMING CHARACTERISTICS
1, 2 (AVCC = +15 V
5%, AVEE = –15 V
5%, AGND = 0 V, REFGND = 0 V, DGND = 0 V. All
specifications 0 C to 70 C, unless otherwise noted.)
DVDD
Parameter
5 V
10%
3.3 V
Unit
Conditions/Comments
t1
00
ns min
CS Falling Edge to STB Falling Edge Setup Time
t2
30
200
ns min
STB Pulse Width
t3
40
70
ns min
STB Rising Edge to CS Rising Edge Setup Time
t4
040
ns min
Data Setup Time
t5
550
560
ns min
CS Falling Edge to CPCK Rising Edge Setup Time
t6
320
320
ns min
CPCK Pulse Width
t7
450
500
ns min
CPCK to
STB Falling Edge Setup Time
t8
150
800
ns min
STB Rising Edge to QMx, CLxDETECT Valid
t9
100
440
ns min
STB Rising Edge to CPOH, CPOL Valid
t10
240
240
µs min
Comparator Setup Time, MODE2, MODE3 settling
t11
150
500
ns min
Comparator Hold Time
t12
100
440
ns min
Comparator Output Delay Time
t13
320
320
ns min
Comparator Strobe Pulse Width
NOTES
1See Figure 1.
2All input signals are specified with tr = tf = 1 ns (10% to 90% of V
DD) and timed from a voltage level of (VIL + VIH)/2.
Specifications subject to change without notice.
t11
t10
t13
t12
CPCK
CPOH, CPOL
MEASVOUT
OR MEASIOUT
Figure 2. Comparator Timing
CPCK
AMx, ACx, FSEL,
MSEL, CPSEL
CS
QM4, QM5,
CLHDETECT,
CLLDETECT
CPOL, CPOH
STB
t3
t2
t1
t4
t5
t6
t7
t8
t9
Figure 1. Timing Diagram


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