© 2008 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FAN3111

• Rev. 1.6

14

Truth Table of Logic Operation

The FAN3111 truth table indicates the operational

states using the dual-input configuration. In a non-

inverting driver configuration, the IN- pin should be a

logic low signal. If the IN- pin is connected to logic high,

a disable function is realized, and the driver output

remains low regardless of the state of the IN+ pin.

Table 1. FAN3111 Truth Table

IN+

IN-

OUT

0

0

0

0

1

0

1

0

1

1

1

0

In the non-inverting driver configuration in Figure 41,

the IN- pin is tied to ground and the input signal (PWM)

is applied to the IN+ pin. The IN- pin can be connected

to logic high to disable the driver and the output

remains low, regardless of the state of the IN+ pin.

VDD

GND

IN-

IN+

OUT

PWM

FAN3111

Figure 41.

Dual-Input Driver Enabled, Non-

Inverting Configuration

In the inverting driver application shown in Figure 42, the

IN+ pin is tied high. Pulling the IN+ pin to GND forces the

output low, regardless of the state of the IN- pin.

VDD

GND

IN-

IN+

OUT

PWM

FAN3111

Figure 42.

Dual-Input Driver Enabled, Inverting

Configuration

Thermal Guidelines

Gate drivers used to switch MOSFETs and IGBTs at

high frequencies can dissipate significant amounts of

power. It is important to determine the driver power

dissipation and the resulting junction temperature in the

application to ensure that the part is operating within

acceptable temperature limits.

The total power dissipation in a gate driver is the sum of

Dynamic

gate

total

P

P

P





(1)

Gate Driving Loss: The most significant power loss

results from supplying gate current (charge per unit

time) to switch the load MOSFET on and off at the

switching frequency. The power dissipation that results

from driving a MOSFET at a specified gate-source

sw

GS

G

GATE

f

V

Q

P







(2)

Dynamic Pre-drive / Shoot-through Current: A power loss

resulting from internal current consumption under

dynamic operating conditions, including pin pull-up /

pull-down resistors, can be obtained using the graphs in

Figure 11 and Figure 12 in Typical Performance

DD

DYNAMIC

DYNAMIC

V

I

P





(3)

Once the power dissipated in the driver is determined,

the driver junction temperature rise with respect to the

device lead can be evaluated using thermal equation:

C

JL

TOTAL

J

T

P

T







(4)

where:

The power dissipated in a gate-drive circuit is

independent of the drive-circuit resistance and is split

proportionately among the resistances present in the

driver, any discrete series resistor present, and the gate

resistance internal to the power switching MOSFET.

Power dissipated in the driver may be estimated using

the following equation:























FET

GATE,

EXT

DRIVER

OUT,

Driver

OUT,

TOTAL

PKG

R

R

R

R

P

P

(5)

where:

the driver output and the gate of the MOSFET; and

and source connections.