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ACT8870QJ-T 数据表(PDF) 20 Page - Active-Semi, Inc |
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ACT8870QJ-T 数据表(HTML) 20 Page - Active-Semi, Inc |
20 / 43 page ACT8870QJ-T Rev 3.0, 02-Oct-2017 Innovative PowerTM www.active-semi.com ActiveSwitcherTM is a trademark of Active-Semi. Copyright © 2016-2017 Active-Semi, Inc. I2CTM is a trademark of NXP 20 I2C INTERFACE ELECTRICAL CHARACTERISTICS (VIO_IN = 1.8V, TA = 25°C, unless otherwise specified.) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SCL, SDA Input Low VIO_IN = 1.8V 0.4 V SCL, SDA Input High VIO_IN = 1.8V 1.25 V SCL, SDA Input Low VIO_IN = 3.3V 1.0 V SCL, SDA Input High VIO_IN = 3.3V 2.3 V SDA Leakage Current SDA=5V 1 µA SDA Output Low IOL = 5mA 0.35 V SCL Clock Frequency, fSCL 0 1000 kHz SCL Low Period, tLOW 0.5 µs SCL High Period, tHIGH 0.26 µs SDA Data Setup Time, tSU 50 ns SDA Data Hold Time, tHD (Note1) 0 ns Start Setup Time, tST For Start Condition 260 ns Stop Setup Time, tSP For Stop Condition 260 ns Capacitance on SCL or SDA Pin 10 pF SDA Fall Time SDA, Tof Device requirement 120 ns Pulse Width of spikes must be suppressed on SCL and SDA 0 50 ns Note1: Comply to I2C timings for 1MHz operation - “Fast Mode Plus”. Note2: No internal timeout for I2C operations, however, I2C communication state machine will be reset when entering RESET, IDLE, OVUVFLT, and THERMAL states to clear any transactions that may have been occurring when entering the above states. Note3: This is an I2C system specification only. Rise and fall time of SCL & SDA not controlled by the device. Note4: Device Address is 7’h5A Figure 2: I2C Data Transfer SDA SCL tST tSU tHD tSP tSCL Start condition Stop condition |
类似零件编号 - ACT8870QJ-T |
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类似说明 - ACT8870QJ-T |
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