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MP1494S 数据表(PDF) 10 Page - Monolithic Power Systems |
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MP1494S 数据表(HTML) 10 Page - Monolithic Power Systems |
10 / 17 page MP1494S – SYNCHRONOUS STEP-DOWN CONVERTER MP1494S Rev. 1.0 www.MonolithicPower.com 10 12/13/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. OPERATION The MP1494S is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in power MOSFETs. It offers a very compact solution to achieve 2A continuous output current with excellent load and line regulation over a wide input supply range. The MP1494S operates in a fixed-frequency, peak-current –control mode to regulate the output voltage. An internal clock initiates a PWM cycle. The integrated high-side power MOSFET turns on and remains on until its current reaches the value set by the COMP voltage. When the power switch is off, it remains off until the next clock cycle starts. If the current in the power MOSFET does not reach the current value set by COMP within 95% of one PWM period, the power MOSFET will be forced to turn off. Internal Regulator The 5V internal regulator power most of the internal circuitries. This regulator takes the VIN input and operates in the full VIN range: When VIN exceeds 5.0V, the output of the regulator is in full regulation; when VIN falls below 5.0V, the output decreases and requires a 0.1µF decoupling ceramic capacitor. Error Amplifier The error amplifier compares the FB pin voltage against the internal 0.8V reference (REF) and outputs a COMP voltage —this COMP voltage controls the power MOSFET current. The optimized internal compensation network minimizes the external component count and simplifies the control loop design. Enable/SYNC control EN/Sync is a digital control pin that turns the regulator on and off: Drive EN high to turn on the regulator, drive it low to turn it off. An internal 1M Ω resistor from EN/Sync to GND allows EN/Sync to be floated to shut down the chip. The EN pin is clamped internally using a 6.5V series Zener diode, as shown in Figure 2. Connect the EN input pin through a pullup resistor to any voltage connected to the VIN pin —the pullup resistor limits the EN input current to less than 100µA. For example, with 12V connected to VIN, RPULLUP ≥ (12V – 6.5V) ÷ 100µA = 55kΩ. Connecting the EN pin is directly to a voltage source without any pullup resistor requires limiting voltage amplitude to ≤ 6V to prevent damage to the Zener diode. Figure 2: 6.5V Zener Diode Connect an external clock with a range of 300kHz to 2MHz 2ms after output voltage is set to synchronize the internal clock rising edge to the external clock rising edge. The pulse width of external clock signal should be less than 1.7 μs. Under-Voltage Lockout Under-voltage lockout (UVLO) protects the chip from operating at an insufficient supply voltage. The MP1494S UVLO comparator monitors the output voltage of the internal regulator, VCC. The UVLO rising threshold is about 3.8V while its falling threshold is 3.15V. Internal Soft-Start The soft-start prevents the converter output voltage from overshooting during startup. When the chip starts, the internal circuitry generates a soft-start voltage (SS) that ramps up from 0V to 1.2V. When SS is lower than REF, SS overrides REF so the error amplifier uses SS as the reference. When SS exceeds REF, the error amplifier uses REF as the reference. The SS time is internally set to 1.5ms. Over-Current Protection and Hiccup The MP1494S has cycle-by-cycle over current limit for when the inductor current peak value exceeds the set current limit threshold. If the output voltage starts to drop until FB is below the Under-Voltage (UV) threshold —typically 50% below the reference —the MP1494S enters hiccup mode to periodically restart the part. |
类似零件编号 - MP1494S |
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类似说明 - MP1494S |
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