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CY2VC521-2 数据表(PDF) 2 Page - Cypress Semiconductor

部件名 CY2VC521-2
功能描述  Low Noise LVDS Clock Generator with VCXO
Download  9 Pages
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制造商  CYPRESS [Cypress Semiconductor]
网页  http://www.cypress.com
标志 CYPRESS - Cypress Semiconductor

CY2VC521-2 数据表(HTML) 2 Page - Cypress Semiconductor

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CY2VC521-2
Document Number: 001-15599 Rev. *E
Page 2 of 9
Pinout
Figure 1. Pin Diagram - 16-Pin TSSOP
Table 1. Pin Definitions - 16-Pin TSSOP
Pin
Name
Type
Description
1
XIN
Crystal
Oscillator Input: Connect a 27 MHz crystal between XIN and XOUT
16
XOUT
Crystal
Oscillator Output: Connect a 27 MHz crystal between XIN and XOUT
5
VIN
Analog Input
VCXO Control Voltage: VIN has a positive control slope, meaning that increasing the
voltage on VIN causes the output frequency to increase. The nominal output frequency
is determined when VIN = 1.65V
13, 14
CLK#, CLK LVDS Output
Differential output clock
9
SEL
CMOS Input
Select: Hold this pin LOW for normal operation
11, 15
NC
No Connect: NC pins are not connected to the die
2, 3, 4, 10
VDD
3.3V power supply
6, 7, 8, 12
VSS
Ground
1
2
314
15
16
XIN
VDD
VDD
XOUT
NC
CLK
VDD
VIN
VSS
VSS
VSS
4
5
611
12
13
CLK#
VSS
NC
7
89
10
VDD
SEL
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