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SN74AUP1T97DBVR 数据表(PDF) 1 Page - Texas Instruments |
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SN74AUP1T97DBVR 数据表(HTML) 1 Page - Texas Instruments |
1 / 15 page SN74AUP1T97 SINGLESUPPLY VOLTAGE LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS SCES613A – OCTOBER 2004 − REVISED DECEMBER 2004 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Available in the Texas Instruments NanoStar and NanoFree Packages D Single-Supply Voltage Translator − 1.8 V to 3.3 V (at VCC = 3.3 V) − 2.5 V to 3.3 V (at VCC = 3.3 V) − 1.8 V to 2.5 V (at VCC = 2.5 V) − 3.3 V to 2.5 V (at VCC = 2.5 V) D Nine Configurable Gate Logic Functions D Schmitt-Trigger Inputs Reject Input Noise and Provide Better Output Signal Integrity D Ioff Supports Partial-Power-Down Mode With Low Leakage Current (0.5 mA) D 200-ns/V Input Rise/Fall Time Allows Slow Transition of Input Signal D Very Low Static and Dynamic Power Consumption D Pb-Free Packages Available: SOT-23 (DBV), SC-70 (DCK), WCSP (NanoFree) D Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II D ESD Performance Tested Per JESD 22 − 2000-V Human-Body Model (A114-B, Class II) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) D Related Devices: AUP1T98/57/58 DBV OR DCK PACKAGE (TOP VIEW) YEP OR YZP PACKAGE (BOTTOM VIEW) 1 2 3 6 5 4 B GND A C VCC Y 3 2 1 4 5 6 A GND B Y VCC C description /ordering information AUP technology is the industry’s lowest-power logic technology designed for use in battery-operated or battery backed-up equipment. The SN74AUP1T97 is designed for logic level translation applications with input switching levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply. The wide VCC range of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and ensures normal operation between this range. Schmitt-trigger inputs ( nVT = 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog-mixed mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and also allow for slow input signal transition. The AUP1T97 can be easily configured to perform a required gate function by connecting A, B, and C inputs to VCC or ground (see Function Selection Table). Up to nine commonly used logic gate functions can be performed. Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage will occur to the device under these conditions. AUP1T97 is designed with optimized current drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high drive outputs. Nanostar and Nanofree package technology is a major breakthrough in IC packaging concepts, using the die as the package. Copyright 2004, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar and NanoFree are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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类似说明 - SN74AUP1T97DBVR |
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