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SLG46534 数据表(PDF) 2 Page - Dialog Semiconductor |
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SLG46534 数据表(HTML) 2 Page - Dialog Semiconductor |
2 / 172 page SLG46534_DS_107 Page 1 of 171 SLG46534 1.0 Overview The SLG46534 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macrocells of the SLG46534. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit. The macrocells in the device include the following: • Three Analog Comparators (ACMP) • Nineteen Combination Function Macrocells • Three Selectable DFF/Latch or 2-bit LUTs • One Selectable Continuous DFF/Latch or 3-bit LUT • Four Selectable DFF/Latch or 3-bit LUTs • One Selectable Pipe Delay or 3-bit LUT • One Selectable Programmable Pattern Generator or 2-bit LUT • Five 8-bit delays/counters or 3-bit LUTs • Two 16-bit delays/counters or 4-bit LUTs • Two Deglitch Filters with Edge Detectors • Asynchronous State Machine • Eight States • Flexible input logic from state transitions • Serial Communications •I2C Protocol compliant • Pipe Delay – 16 stage/3 output (Part of Combination Function Macrocell) • Programmable Delay • Two Oscillators (OSC) • Configurable 25 kHz/2 MHz • 25 MHz RC Oscillator • Crystal Oscillator • Power-On-Reset (POR) • Eight Byte RAM + OTP User Memory • RAM Memory space that is readable and writable via I2C • User defined initial values transferred from OTP |
类似零件编号 - SLG46534 |
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类似说明 - SLG46534 |
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