数据搜索系统,热门电子元器件搜索 |
|
SLG46534 数据表(PDF) 91 Page - Dialog Semiconductor |
|
SLG46534 数据表(HTML) 91 Page - Dialog Semiconductor |
91 / 172 page SLG46534_DS_107 Page 90 of 171 SLG46534 Each of the ACMP cells has a positive input signal that can be provided by a variety of external sources. There is also a selectable gain stage (1X, 0.5X, 0.33X, 0.25X) before connection to the analog comparator. The Gain divider is unbuffered and consists of 250 KΩ (typ.) resistors, see Table 73. For gain divider accuracy refer to Table 74. IN- voltage range: 0 - 1.2 V. Can use Vref selection VDD/4 and VDD/3 to maintain this input range. Input bias current < 1 nA (typ). Figure 51. Maximum Power On Delay vs. VDD, BG = 550 µs. 600 650 700 750 800 850 900 950 1000 1050 1100 VDD (V) -40⁰C +25⁰C +85⁰C Figure 52. Maximum Power On Delay vs. VDD, BG = 100 µs. 120 130 140 150 160 170 180 190 200 210 220 VDD (V) -40⁰C +25⁰C +85⁰C |
类似零件编号 - SLG46534 |
|
类似说明 - SLG46534 |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |