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SLG46534 数据表(PDF) 65 Page - Dialog Semiconductor |
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SLG46534 数据表(HTML) 65 Page - Dialog Semiconductor |
65 / 172 page SLG46534_DS_107 Page 64 of 171 SLG46534 9.6 3-Bit LUT or 8-Bit Counter / Delay Macrocells There are five macrocells that can serve as either 3-bit LUTs or as Counter / Delays. When used to implement LUT function, the 3-bit LUT takes in three input signals from the connection matrix and produces a single output, which goes back into the connec- tion matrix. When used to implement 8-Bit Counter / Delay function, two of the three input signals from the connection matrix go to the external clock (ext_clk) and reset (DLY_in/CNT_Reset) for the counter/delay, with the output going back to the connection matrix. These macrocells can also operate in a one-shot mode, which will generate an output pulse of user-defined width. These macrocells can also operate in a frequency detection or edge detection mode. For timing diagrams refer to section 9.8 CNT/DLY/FSM Timing Diagrams Two of the five macrocells can have their active count value read via I2C (CNT4 and CNT6). See Section 19.5.1.2 Reading Counter Data via I2C for further details. 9.6.1 3-Bit LUT or 8- Bit CNT/DLY Block Diagrams Figure 29. 3-bit LUT5 or CNT/DLY2 CNT/DLY2 OUT clk DLY_in/CNT_Reset 3-bit LUT5 OUT IN0 IN1 8-bits NVM 1-bit NVM IN2 reg <1543:1536> reg <1198> From Connection Matrix Output <83> From Connection Matrix Output <84> To Connection Matrix Input <17> From Connection Matrix Output <85> LUT Truth Table CNT Data S0 S1 S0 S1 S0 S1 0: 3-bit LUT5 IN1 1: CNT/DLY2 clk 0: 3-bit LUT5 OUT 1: CNT/DLY2 OUT 0: 3-bit LUT5 IN0 1: CNT/DLY2 RST |
类似零件编号 - SLG46534 |
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类似说明 - SLG46534 |
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