MRF89XA datasheet(25/140 Pages) MICROCHIP

部件名	MRF89XA

功能描述	Ultra Low-Power, Integrated ISM BandSub-GHz Transceiver

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制造商	MICROCHIP [Microchip Technology]

网页	http://www.microchip.com

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25 / 140 page

 2010-2017 Microchip Technology Inc.

Preliminary

DS70000622D-page 25

MRF89XA

2.11.2

SPI DATA

Write Byte (before/during TX) - To write bytes into the

FIFO, the timing diagram illustrated in Figure 2-14

should be followed by the host microcontroller.

FIGURE 2-14:

WRITE BYTES SEQUENCE (EXAMPLE DIAGRAM FOR 2 BYTES)

Read Byte (after/during RX) - To read bytes from the

FIFO, the timing diagram illustrated in Figure 2-15

should be followed by the host microcontroller.

FIGURE 2-15:

READ BYTES SEQUENCE (EXAMPLE DIAGRAM FOR 2 BYTES)

Note:

It is compulsory to toggle CSDAT back

high between each byte written. The byte

is pushed into the FIFO on the rising edge

of CSDAT.

SCK (In)

SDI (In)

SDO (Out)

x

D1(6) D1(5) D1(4) D1(3)D1(2) D1(1)

D2(7) D2(6) D2(5) D2(4) D2(3) D2(2) D2(1) D2(0)

D1(0)

D1(7)

HZ

(input)

HZ

(input)

HZ

(input)

CSDAT(In)

x

1

5

4

3

2

6

8

7

15

4

3

26

8

7

1stbyte written

2ndbyte written

Note:

It is recommended to toggle CSDAT back

high between each byte read.

SCK (In)

SDO (Out)

D1(6) D1(5) D1(4) D1(3) D1(2) D1(1)

D2(7) D2(6) D2(5) D2(4) D2(3) D2(2) D2(1) D2(0)

D1(0)

D1(7)

HZ

(input)

HZ

(input)

SDI (In)

x

HZ

(input)

CSDAT (In)

1

5

4

3

2

6

8

7

15

4

3

26

8

7

Second byte read

x

First byte read

类似零件编号 - MRF89XA

制造商	部件名	数据表	功能描述
Microchip Technology	MRF89XAM8A	682Kb / 34P	868 MHz Ultra-Low Power 08/04/10
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	MRF89XAM8A-I/RM	682Kb / 34P	868 MHz Ultra-Low Power 08/04/10
	MRF89XAM8AT-I/RM	682Kb / 34P	868 MHz Ultra-Low Power 08/04/10
	MRF89XAM9A	623Kb / 36P	915 MHz Ultra Low-Power Sub-GHz Transceiver Module 11/29/12

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